A 3.3V 10‐b 135‐Msample/s Folding and Interpolating Analog‐to‐Digital Converter
碩士 === 國立成功大學 === 電機工程學系碩博士班 === 93 === This thesis describes a 3.3V, 10-bit, 135MS/s ADC suited for video applications. The proposed ADC is designed with a folding and interpolation architecture and is divided into two primary components, a 4-bit coarse converter and a 6-bit fine converter. The co...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2005
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/23864139857254323654 |