The Design and Implementation of Thermal Sensor and Sigma-Delta ADC System IC
碩士 === 國立成功大學 === 電機工程學系碩博士班 === 93 === In this thesis, we research a sigma-delta analog-to-digital converter for bio-medical system application, using the thermal sensor to verify this system. The front end is 2-2 cascade sigma-delta modulator, integrating in TSMC 0.18um CMOS 1P6M technology. Wit...
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ndltd-TW-093NCKU54421702017-06-11T04:32:54Z http://ndltd.ncl.edu.tw/handle/37439364713531611744 The Design and Implementation of Thermal Sensor and Sigma-Delta ADC System IC 溫度感測與三角積分類比數位轉換器系統晶片之研製 Yong-Guang Miao 繆永光 碩士 國立成功大學 電機工程學系碩博士班 93 In this thesis, we research a sigma-delta analog-to-digital converter for bio-medical system application, using the thermal sensor to verify this system. The front end is 2-2 cascade sigma-delta modulator, integrating in TSMC 0.18um CMOS 1P6M technology. With the sampling frequency of 1MHz, signal bandwidth of 4kHz, and oversampling ratio of 128, it can achieve 84.14dB signal-to-noise ratio, and 13 bits resolution. Then, with regard to the specification of SDM, we design digital decimation filter in the back end, reducing the sampling frequency to twice signal bandwidth. We make use of verilog hardware description language to realize this digital filter, and download FPGA to verify the hardware. Therefore, we finish the sigma-delta ADC system. Eventually, we utilize the thermal sensor to verify the ADC system. The CMOS vertical parasitic BJT is chosen to be the sensor. The accuracy of sensor is under the operation range of with calibration. The accuracy of the whole thermal to digital converter system can be within , with the resolution of 12 bits. Ching-Hsing Luo 羅錦興 2005 學位論文 ; thesis 98 zh-TW |
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碩士 === 國立成功大學 === 電機工程學系碩博士班 === 93 === In this thesis, we research a sigma-delta analog-to-digital converter for bio-medical system application, using the thermal sensor to verify this system. The front end is 2-2 cascade sigma-delta modulator, integrating in TSMC 0.18um CMOS 1P6M technology. With the sampling frequency of 1MHz, signal bandwidth of 4kHz, and oversampling ratio of 128, it can achieve 84.14dB signal-to-noise ratio, and 13 bits resolution. Then, with regard to the specification of SDM, we design digital decimation filter in the back end, reducing the sampling frequency to twice signal bandwidth. We make use of verilog hardware description language to realize this digital filter, and download FPGA to verify the hardware. Therefore, we finish the sigma-delta ADC system.
Eventually, we utilize the thermal sensor to verify the ADC system. The CMOS vertical parasitic BJT is chosen to be the sensor. The accuracy of sensor is under the operation range of with calibration. The accuracy of the whole thermal to digital converter system can be within , with the resolution of 12 bits.
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Ching-Hsing Luo |
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Ching-Hsing Luo Yong-Guang Miao 繆永光 |
author |
Yong-Guang Miao 繆永光 |
spellingShingle |
Yong-Guang Miao 繆永光 The Design and Implementation of Thermal Sensor and Sigma-Delta ADC System IC |
author_sort |
Yong-Guang Miao |
title |
The Design and Implementation of Thermal Sensor and Sigma-Delta ADC System IC |
title_short |
The Design and Implementation of Thermal Sensor and Sigma-Delta ADC System IC |
title_full |
The Design and Implementation of Thermal Sensor and Sigma-Delta ADC System IC |
title_fullStr |
The Design and Implementation of Thermal Sensor and Sigma-Delta ADC System IC |
title_full_unstemmed |
The Design and Implementation of Thermal Sensor and Sigma-Delta ADC System IC |
title_sort |
design and implementation of thermal sensor and sigma-delta adc system ic |
publishDate |
2005 |
url |
http://ndltd.ncl.edu.tw/handle/37439364713531611744 |
work_keys_str_mv |
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