| Summary: | 碩士 === 國立成功大學 === 電機工程學系碩博士班 === 93 === In this thesis, we research a sigma-delta analog-to-digital converter for bio-medical system application, using the thermal sensor to verify this system. The front end is 2-2 cascade sigma-delta modulator, integrating in TSMC 0.18um CMOS 1P6M technology. With the sampling frequency of 1MHz, signal bandwidth of 4kHz, and oversampling ratio of 128, it can achieve 84.14dB signal-to-noise ratio, and 13 bits resolution. Then, with regard to the specification of SDM, we design digital decimation filter in the back end, reducing the sampling frequency to twice signal bandwidth. We make use of verilog hardware description language to realize this digital filter, and download FPGA to verify the hardware. Therefore, we finish the sigma-delta ADC system.
Eventually, we utilize the thermal sensor to verify the ADC system. The CMOS vertical parasitic BJT is chosen to be the sensor. The accuracy of sensor is under the operation range of with calibration. The accuracy of the whole thermal to digital converter system can be within , with the resolution of 12 bits.
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