| Summary: | 博士 === 國立成功大學 === 電機工程學系碩博士班 === 93 === This dissertation proposes a high-efficiency high-step-up power converter with low voltage stress on the power switch, power diodes and output capacitors. The circuit topology of the proposed converter consists of an energy clamp circuit and a voltage boost cell. The boost converter functions as an active-clamp circuit to suppress the voltage spike on the power switch during the turn-off transient period. The integrated boost-flyback converter (IBFC) uses coupled-inductor techniques to achieve high-step-up voltage with low duty ratio, and thus the slope compensation circuit is disregarded. The boost converter output terminal and flyback converter output terminal are serially connected to increase the output voltage gain with the coupled inductor. By serially connecting the secondary windings of the boost inductor, a high voltage gain is achieved with less voltage stress on the power devices, such as on the power MOSFET and power diodes.
The operating principles, theoretical analysis and design methodology of the proposed converter are presented. The voltage gain and efficiency at steady state are derived using the principles of inductor volt-second balance, capacitor charge balance, and the small-ripple approximation for continuous-conduction mode (CCM). A 35W, 12VDC input, 42VDC output, fsw= 38kHz IBFC with simulation and experimental results has been implemented in the laboratory to validate the theoretical analysis. A design procedure is expounded, and design guidelines for selecting critical components are also presented. This dissertation reveals that high voltage gain with high efficiency (nearly 93%) can be achieved by the IBFC system.
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