Hierarchical Quad-Grid Power System for Modern SoC Chips
碩士 === 中華大學 === 資訊工程學系碩士班 === 93 === As the chip manufacture procedure and the material technology advances from micrometer (μm) to nanometer, the wire width in a power network has been decreasing and the resistance of the wires becomes greater. The voltage loss caused by delivering current on these...
Main Authors: | Chia-Wei Wu, 吳嘉偉 |
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Other Authors: | Jin-Tai Yan |
Format: | Others |
Language: | zh-TW |
Published: |
2005
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Online Access: | http://ndltd.ncl.edu.tw/handle/70911366702500183969 |
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