Design a Parallel Hardware for Implementing Virtual B+ Search Tree

• Main Authors: KUANG-LING CHIU, 丘廣嶺
• Other Authors: Wen-Lung Shu
• Format: Others
• Language: zh-TW
• Published: 2005
• Online Access: http://ndltd.ncl.edu.tw/handle/76516648470319140955

碩士 === 中華大學 === 資訊工程學系碩士班 === 93 === 1.1 Research Motivations and Goal As computer technology have a great improvement in hardware performance and physical size, The major components of computer system are getting cheaper. Everybody use the computer network for every minute and every moment on the world. It’s becomes network distributed cluster environments seem to be the future architecture trend and let scholars research the network distributed cluster environments subject. High performance for using hardware circuit control parallel system speed up performance by virtual search tree algorithm . The ones that use the circuit of the hardware to control the highly parallel system and bring accelerating, Only increase a little hardware module cost, Using hardware module invention built and constructed searches trees and avoids maintaining the added burden of the arborescent structure。Do not need to increase the burden of CPU. Do not need to use the high-level language to change into machine language and control and gather together the cluster computers to control in the parallel system of control coordinating。 In this dissertation, We bring up a hardware module architecture to creating m-1 way search algorithm on cluster-Base network system. Use the high parallel environment that closely fits of hardware under not increasing the situation of the load of CPU with its peculiar fictitious structure. 1.2 Research Goal Base on the research motivation and background, we can realize if we apply Hardware-Base cluster search architecture for huge amount of data, the problem of speeding up will be very important. And hardware implementation of m-1 way virtual search algorithm could be very useful in speeding up this optimization process. On the other hand operations in hardware parallelizing and pipelining can be implemented very easily. For this purpose, this thesis is try carry out the goal using hardware implementation to improve the execution efficiency of m-1 way virtual search algorithm. 1.3 Thesis Organization In this thesis organization, We will describe the related other search & m way search algorithm advantage like on chapter2. Regarding the m-1 way virtual search tree background was introduce in chapter3. In chapter4 & chapter6, Overview the software design & hardware design program improvement m-1 way search related experience, In chapter4 was implementing m-1 way virtual search using PVM in PC Cluster. In Chapter5 was implementing hardware module for m-1 way virtual search using the VHDL . In Chapter6 overall hardware module architecture and evaluate the performance. Finally, we conclude this research work in chapter7.