GHz Phase-Locked Loop Design with Low-Power

GHz Phase-Locked Loop Design with Low-Power

碩士 === 中州技術學院 === 工程技術研究所 === 92 === Phase-locked loop (PLL) is the component broadly used in various field of integrated circuits. Phase-locked loop is generally used in clock recovery of communication system and frequency synthesizer of wireless communication system. Recently, owing to the broadly...

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Bibliographic Details
Main Authors:	Chih-Ming Chang, 張志銘
Other Authors:	Sun-Nien Yu
Format:	Others
Language:	zh-TW
Published:	2005
Online Access:	http://ndltd.ncl.edu.tw/handle/44926004369912166760

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