Integrated IPv6 and MPLS Data Plane on High Performance Network Processor Platform

碩士 === 國立中正大學 === 電機工程所 === 93 === MPLS (Multi-Protocol Label Switching) and IPv6 are two of the next generation backbone network technologies. Integration of IPv6 and MPLS not only help realizing some advantages of IPv6 but also provide a soluation to the transition of IPv4 to IPv6. In this thesis...

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Main Authors: Tsun-Wei Fang, 方存偉
Other Authors: none
Format: Others
Language:zh-TW
Published: 2005
Online Access:http://ndltd.ncl.edu.tw/handle/32170566652982485485
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spelling ndltd-TW-093CCU054420282015-10-13T10:45:04Z http://ndltd.ncl.edu.tw/handle/32170566652982485485 Integrated IPv6 and MPLS Data Plane on High Performance Network Processor Platform 網際網路協定第六版與多重協定標籤交換的資料平面弁鄏b高階網路處理器平台之整合 Tsun-Wei Fang 方存偉 碩士 國立中正大學 電機工程所 93 MPLS (Multi-Protocol Label Switching) and IPv6 are two of the next generation backbone network technologies. Integration of IPv6 and MPLS not only help realizing some advantages of IPv6 but also provide a soluation to the transition of IPv4 to IPv6. In this thesis, we focus on realizing the integration of IPv6 and MPLS in the Data Plane of the Intel IXP2400 network processor platform. Key word: IPv6, MPLS, Network Processor none 侯廷昭 2005 學位論文 ; thesis 61 zh-TW
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description 碩士 === 國立中正大學 === 電機工程所 === 93 === MPLS (Multi-Protocol Label Switching) and IPv6 are two of the next generation backbone network technologies. Integration of IPv6 and MPLS not only help realizing some advantages of IPv6 but also provide a soluation to the transition of IPv4 to IPv6. In this thesis, we focus on realizing the integration of IPv6 and MPLS in the Data Plane of the Intel IXP2400 network processor platform. Key word: IPv6, MPLS, Network Processor
author2 none
author_facet none
Tsun-Wei Fang
方存偉
author Tsun-Wei Fang
方存偉
spellingShingle Tsun-Wei Fang
方存偉
Integrated IPv6 and MPLS Data Plane on High Performance Network Processor Platform
author_sort Tsun-Wei Fang
title Integrated IPv6 and MPLS Data Plane on High Performance Network Processor Platform
title_short Integrated IPv6 and MPLS Data Plane on High Performance Network Processor Platform
title_full Integrated IPv6 and MPLS Data Plane on High Performance Network Processor Platform
title_fullStr Integrated IPv6 and MPLS Data Plane on High Performance Network Processor Platform
title_full_unstemmed Integrated IPv6 and MPLS Data Plane on High Performance Network Processor Platform
title_sort integrated ipv6 and mpls data plane on high performance network processor platform
publishDate 2005
url http://ndltd.ncl.edu.tw/handle/32170566652982485485
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