| Summary: | 碩士 === 國立中正大學 === 電機工程所 === 93 === A 8-bit successive approximation ADC with current calibration technique is proposed in the thesis for micro-stimulator system . A segmented current mode DAC is used in the SA ADC .
However , in order to get better accuracy and larger output swing for DAC , and reduce the influence on the performance of SA ADC , this thesis improves original segmented current mode DAC by way of bi-directional and current calibration technique that make the DAC conform to the requirements of the SA ADC .
According to the DAC’s experimental result , the INL is smaller than 0.35LSB and the DNL is smaller than 0.27LSB . We use the DAC to implement the SA ADC under the supply voltage of 3V . The resolution and the conversion rate is 8bit and 125KHz respectively .
The SA ADC has been implemented in the TSMC 0.35um 2P4M mixed signal process . The experimental results of the SA ADC are as follows : The INL is smaller than 0.82LSB , the DNL is smaller than 0.8LSB , the effective number of bit (ENOB) is 7.74bit , and the total power consumption is 4.7mW .
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