The Research of Low-voltage high-gain CMOS operational amplifier with enhanced PSRR
碩士 === 國立雲林科技大學 === 電子與資訊工程研究所碩士班 === 92 === Conventional Miller compensation is used in operational amplifiers and thus suffers from poor power supply rejection ratio at high frequencies , in this thesis , a low-voltage high-gain operational amplifier with enhanced PSRR in standard TSMC 0.35μm 2P4M...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2004
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| Online Access: | http://ndltd.ncl.edu.tw/handle/40785516497946056677 |
| Summary: | 碩士 === 國立雲林科技大學 === 電子與資訊工程研究所碩士班 === 92 === Conventional Miller compensation is used in operational amplifiers and thus suffers from poor power supply rejection ratio at high frequencies , in this thesis , a low-voltage high-gain operational amplifier with enhanced PSRR in standard TSMC 0.35μm 2P4M CMOS process is presented. By using cascode compensation, the resulting power supply rejection ratio (PSRR) at high frequency is greatly improved .A critical aspect in low-voltage design is the input common-mode range, which depends on the input stage. Specifically the differential input stage arranged with a folded-cascode active load has been used to save input swing and achieve high gain .The operational amplifier adopts neutralization capacitors topology for input stage to reduce the input capacitances and increase the input resistance .Using these principles, the operational amplifier has been designed that can operate down to 1.2V.
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