Design and Implementation of Hardware/Software Codesign for SoC CAD Tool

• Main Authors: Li-an Chiang, 姜禮安
• Other Authors: Fu-chiung Cheng
• Format: Others
• Language: en_US
• Published: 2004
• Online Access: http://ndltd.ncl.edu.tw/handle/81438501253471058557

碩士 === 大同大學 === 資訊工程學系(所) === 92 === Embedded system designers are constantly looking for new tools and techniques to help satisfy the exploding demand for consumer information appliances and specialized industrial products. One critical barrier to the timely release of embedded system products is integrating the design of the hardware and software systems. In addition to its critical role in the development of embedded systems, co-design is a key design methodology for Systems-on-a-Chip. CAD tools that can easily help to proceed codesign is necessary. In this paper, we propose a new hardware/software codesign methodology targets reconfigurable architectures (FPGA), and develop a codesign system for our SOCAD tool. The SOCAD contains a translator that can translate Java code into VHDL code based on self-timed cell library. The partitioning algorithm in the codesign system uses the Saving Time Cost Effective strategy to select the beneficial and critical methods. The number of logic elements to each method is the constraint. There will output VHDL codes for hardware part and Java code for Software part in the end.