An Automatic Layout Generator for I/O Cells

• Main Authors: Li-Chun Tien, 田麗鈞
• Other Authors: Jing-Jou Tang
• Format: Others
• Language: zh-TW
• Published: 2004
• Online Access: http://ndltd.ncl.edu.tw/handle/19284753676566635741

碩士 === 南台科技大學 === 電子工程系 === 92 === We present a new design methodology for I/O cell library design automation. It’s different from the conventional cell library compilers or generators, which generate the cells for standard cells or regular structures (e.g., SRAM). The proposed compiler will generate I/O cells based on a set of parameterized unit-cells with the features of scalable geometry dependence. The compilation results of the I/O cells have been proved in a 0.13um LOGIC 1P8M process. Through this compiler, the number of unit-cells needed to be maintained is dramatically reduced, thereby reducing library development costs and time to market.