Design and Application of CMOS DLL in Clock Synthesizers and Time-to-Digital Converters
博士 === 國立臺灣大學 === 電機工程學研究所 === 92 === The main goal of this dissertation is to apply the CMOS delay-locked loop (DLL) technique to solve the problems occurred in clock synthesis and time digitization. It is divided into two parts. The first part of this text discusses the design of ROSC-type (Ring O...
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| Format: | Others |
| Language: | en_US |
| Published: |
2004
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| Online Access: | http://ndltd.ncl.edu.tw/handle/73981119801694424987 |