Characterization of Low-Stress Electroplating Cu Films by Using CuSiF6 as Electrolyte
碩士 === 國立清華大學 === 電子工程研究所 === 92 === As the integrated circuits (IC) step into deep sub-half-micron regime, devices dimensions are scaled down and the interconnect lines become thinner and narrower, the resistance and current density in the wire will increase, and the RC delay time and Joule heating...
Main Authors: | Chao-Sheng Cheng, 鄭兆陞 |
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Other Authors: | Huey-Liang Hwang |
Format: | Others |
Language: | en_US |
Published: |
2004
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Online Access: | http://ndltd.ncl.edu.tw/handle/79126661557791565483 |
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