Clock Recovery and Data Recovery Based on PLL for LVDS Transceivers

碩士 === 國立中山大學 === 通訊工程研究所 === 92 === The topic of this thesis is to propose a dual-tracking clock data recovery device and method for LVDS. Particularly, it is related to a high speed data transmission which utilizes phase-locked loops (PLL) to trace and track two eyes (left eye and right eye), cal...

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Bibliographic Details
Main Authors:	Chun-Yang Hsiao, 蕭俊揚
Other Authors:	Chun-Chin Wang
Format:	Others
Language:	zh-TW
Published:	2004
Online Access:	http://ndltd.ncl.edu.tw/handle/45068183417664208851

id	ndltd-TW-092NSYS5650008
record_format	oai_dc
spelling	ndltd-TW-092NSYS56500082015-10-13T13:08:02Z http://ndltd.ncl.edu.tw/handle/45068183417664208851 Clock Recovery and Data Recovery Based on PLL for LVDS Transceivers 使用PLL之LVDS傳接器中時脈回復及資料回復器 Chun-Yang Hsiao 蕭俊揚碩士國立中山大學通訊工程研究所 92 The topic of this thesis is to propose a dual-tracking clock data recovery device and method for LVDS. Particularly, it is related to a high speed data transmission which utilizes phase-locked loops (PLL) to trace and track two eyes (left eye and right eye), called dual-tracking, to align data sampling at the middle of data eye. Hence, the detection of the data is ensured to be optimal and the BER (bit error rate) is drastically reduced. Chun-Chin Wang 王朝欽 2004 學位論文 ; thesis 43 zh-TW
collection	NDLTD
language	zh-TW
format	Others
sources	NDLTD
description	碩士 === 國立中山大學 === 通訊工程研究所 === 92 === The topic of this thesis is to propose a dual-tracking clock data recovery device and method for LVDS. Particularly, it is related to a high speed data transmission which utilizes phase-locked loops (PLL) to trace and track two eyes (left eye and right eye), called dual-tracking, to align data sampling at the middle of data eye. Hence, the detection of the data is ensured to be optimal and the BER (bit error rate) is drastically reduced.
author2	Chun-Chin Wang
author_facet	Chun-Chin Wang Chun-Yang Hsiao 蕭俊揚
author	Chun-Yang Hsiao 蕭俊揚
spellingShingle	Chun-Yang Hsiao 蕭俊揚 Clock Recovery and Data Recovery Based on PLL for LVDS Transceivers
author_sort	Chun-Yang Hsiao
title	Clock Recovery and Data Recovery Based on PLL for LVDS Transceivers
title_short	Clock Recovery and Data Recovery Based on PLL for LVDS Transceivers
title_full	Clock Recovery and Data Recovery Based on PLL for LVDS Transceivers
title_fullStr	Clock Recovery and Data Recovery Based on PLL for LVDS Transceivers
title_full_unstemmed	Clock Recovery and Data Recovery Based on PLL for LVDS Transceivers
title_sort	clock recovery and data recovery based on pll for lvds transceivers
publishDate	2004
url	http://ndltd.ncl.edu.tw/handle/45068183417664208851
work_keys_str_mv	AT chunyanghsiao clockrecoveryanddatarecoverybasedonpllforlvdstransceivers AT xiāojùnyáng clockrecoveryanddatarecoverybasedonpllforlvdstransceivers AT chunyanghsiao shǐyòngpllzhīlvdschuánjiēqìzhōngshímàihuífùjízīliàohuífùqì AT xiāojùnyáng shǐyòngpllzhīlvdschuánjiēqìzhōngshímàihuífùjízīliàohuífùqì
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Clock Recovery and Data Recovery Based on PLL for LVDS Transceivers

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