Implementation of 5.8 GHz RF Receiver Circuits for WLAN Applications

碩士 === 國立中央大學 === 電機工程研究所 === 92 === Abstract The work use tsmc 0.18µm 1P6M CMOS technology to develop 5GHz U-NII band 5.725GHz~5.825GHz CMOS RFICs for the 802.11a WLAN receiver. The designed 5GHz RFICs include the low noise amplifier, T/R switch, image rejection mixer, sub-harmonic mixer.The first...

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Main Authors: Jenq-Pyng Chen, 陳政平
Other Authors: Hwann-Kaeo Chiou
Format: Others
Language:zh-TW
Published: 2004
Online Access:http://ndltd.ncl.edu.tw/handle/14144676378997272508
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spelling ndltd-TW-092NCU054420712015-10-13T13:04:43Z http://ndltd.ncl.edu.tw/handle/14144676378997272508 Implementation of 5.8 GHz RF Receiver Circuits for WLAN Applications 應用於無線區域網路5.8GHz射頻接收電路之研製 Jenq-Pyng Chen 陳政平 碩士 國立中央大學 電機工程研究所 92 Abstract The work use tsmc 0.18µm 1P6M CMOS technology to develop 5GHz U-NII band 5.725GHz~5.825GHz CMOS RFICs for the 802.11a WLAN receiver. The designed 5GHz RFICs include the low noise amplifier, T/R switch, image rejection mixer, sub-harmonic mixer.The first part of the thesis is the design of 5.8GHz low noise amplifier. The performances are obtained as the gain of 10.5 dB, noise figure of 4.13 dB, input and output third order intercept point of 6dBm /14.5dBm, input 1 dB compression point of –9dBm. The second part of the thesis is a 5.8GHz T/R switch. The following performances were measured as the insertion loss of 2.33dB, isolation of 35.75dB, input 1 dB compression point of 18dBm in 16-finger device. The performances are shown as insertion loss of 1.75dB, isolation of27.4dB, input 1 dB compression point of 17dBm in 128-finger design. The third part of the thesis is of 5.8GHz image rejection mixer. The measured results are the conversion loss of 4.2 dB, input 1 dB compression point of -14dBm, noise figure of 23dB, isolation is greater than 30 dB, input and output third intercept point of 0dBm /-5.1dBm, and image reject ratio is 19dB. The fourth part of the thesis is a 5.8GHz subharmonic Mixer. The measurement results are achieved as follow. The conversion loss is 1.15dB, input power at the 1dB gain compression point is -6dBm, signal isolation is greater than 30dB, and input third intercept point is -2.5 dBm/-4dBm. The other Gilbert cell mixer was designed for comparison. It obtains the conversion loss of 5.15dB, input power at the 1dB gain compression point is -6dBm, signal isolation is greater than 30dB, and input third intercept point is 3dBm/0.5dBm. Since the accuracy of tsmc 0.18 µm CMOS RF model, the designed RFICs show very good agreements between the simulations and measurements under careful design and layout procedures. The basic cell circuits for 5 GHz band receiver including LNA, switch, and mixer are successfully developed in this thesis. The future work will integrate these circuits to be a high level receiver. Hwann-Kaeo Chiou 邱煥凱 2004 學位論文 ; thesis 108 zh-TW
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description 碩士 === 國立中央大學 === 電機工程研究所 === 92 === Abstract The work use tsmc 0.18µm 1P6M CMOS technology to develop 5GHz U-NII band 5.725GHz~5.825GHz CMOS RFICs for the 802.11a WLAN receiver. The designed 5GHz RFICs include the low noise amplifier, T/R switch, image rejection mixer, sub-harmonic mixer.The first part of the thesis is the design of 5.8GHz low noise amplifier. The performances are obtained as the gain of 10.5 dB, noise figure of 4.13 dB, input and output third order intercept point of 6dBm /14.5dBm, input 1 dB compression point of –9dBm. The second part of the thesis is a 5.8GHz T/R switch. The following performances were measured as the insertion loss of 2.33dB, isolation of 35.75dB, input 1 dB compression point of 18dBm in 16-finger device. The performances are shown as insertion loss of 1.75dB, isolation of27.4dB, input 1 dB compression point of 17dBm in 128-finger design. The third part of the thesis is of 5.8GHz image rejection mixer. The measured results are the conversion loss of 4.2 dB, input 1 dB compression point of -14dBm, noise figure of 23dB, isolation is greater than 30 dB, input and output third intercept point of 0dBm /-5.1dBm, and image reject ratio is 19dB. The fourth part of the thesis is a 5.8GHz subharmonic Mixer. The measurement results are achieved as follow. The conversion loss is 1.15dB, input power at the 1dB gain compression point is -6dBm, signal isolation is greater than 30dB, and input third intercept point is -2.5 dBm/-4dBm. The other Gilbert cell mixer was designed for comparison. It obtains the conversion loss of 5.15dB, input power at the 1dB gain compression point is -6dBm, signal isolation is greater than 30dB, and input third intercept point is 3dBm/0.5dBm. Since the accuracy of tsmc 0.18 µm CMOS RF model, the designed RFICs show very good agreements between the simulations and measurements under careful design and layout procedures. The basic cell circuits for 5 GHz band receiver including LNA, switch, and mixer are successfully developed in this thesis. The future work will integrate these circuits to be a high level receiver.
author2 Hwann-Kaeo Chiou
author_facet Hwann-Kaeo Chiou
Jenq-Pyng Chen
陳政平
author Jenq-Pyng Chen
陳政平
spellingShingle Jenq-Pyng Chen
陳政平
Implementation of 5.8 GHz RF Receiver Circuits for WLAN Applications
author_sort Jenq-Pyng Chen
title Implementation of 5.8 GHz RF Receiver Circuits for WLAN Applications
title_short Implementation of 5.8 GHz RF Receiver Circuits for WLAN Applications
title_full Implementation of 5.8 GHz RF Receiver Circuits for WLAN Applications
title_fullStr Implementation of 5.8 GHz RF Receiver Circuits for WLAN Applications
title_full_unstemmed Implementation of 5.8 GHz RF Receiver Circuits for WLAN Applications
title_sort implementation of 5.8 ghz rf receiver circuits for wlan applications
publishDate 2004
url http://ndltd.ncl.edu.tw/handle/14144676378997272508
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