Embedded DSP Processor Module Generatorand Its IP and Communication System Applications
碩士 === 國立中央大學 === 電機工程研究所 === 92 === In this thesis, we modify our group's DSP verilog code for intellectual property and reuse methodology. In order to follow IP qualification guidelines, we rewrite our code and find the rule about blocking and non-blocking is hard to fit. So we should follow...
| Main Authors: | , |
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2004
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| Online Access: | http://ndltd.ncl.edu.tw/handle/79029022748185920890 |