| Summary: | 碩士 === 國立交通大學 === 電機與控制工程系所 === 92 === This thesis presents a new and extremely simple low-voltage low-power voltage reference
circuit. The voltage reference circuit uses the peaking current mirror
circuit to extract the current with PTAT (proportional to
absolute temperature), and then the current, through a resistor, is used to compensate for the gate-source voltage
with the negative temperature coefficient. Since the transistors in the peaking current
mirror circuit are operated in weak inversion (subthreshold region), both the power consumption
and the required working supply voltage of the reference
circuit are all low. The
circuit only requires six elements, four transistors and two
resistors. The proposed circuit is implemented
using the TSMC 0.35um 3P3M SiGe BiCMOS technology. The design IC,
after post simulation, attains the minimum supply voltage 1.4 V, output reference voltage 710 mv,
temperature coefficient of 17 ppmC,$ power consumption 6.68 uW
and power supply noise rejection ratio -84 dB at 1MHz.
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