Build a Design Model and Improve the Peak SNR Equation of Sigma Delta A/D Converters in Single Loop Second Order Multi-Bit Architectures
碩士 === 國立交通大學 === 電機與控制工程系所 === 92 === In the thesis, we focus on sigma delta modulator in single loop second order multi-bits architectures, and build a design model for one. There is a main objective which designer can obtain related parameter and accomplish scheme of circuitry faster. In addition...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2004
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| Online Access: | http://ndltd.ncl.edu.tw/handle/8cq895 |