KU-Band frequency synthesizer design

• Main Authors: MING-CHUNG LIN, 林明忠
• Other Authors: Christina F. Jou
• Format: Others
• Language: en_US
• Published: 2004
• Online Access: http://ndltd.ncl.edu.tw/handle/54156050027628460183

碩士 === 國立交通大學 === 電機資訊學院碩士在職專班 === 92 === The thesis is divided into two parts. In the section 1, we describe the Ku-band synthesizer. Section 2 describes the CMOS RF circuits simulation for the 5GHz frequency range. In the Ku-band synthesizer, the voltage tuned dielectric resonator oscillator (VTDRO), Phase-locked loop (PLL) controller and automatic gain control (AGC) circuits are combined by the distributed devices. The synthesizer frequency and output power level could be control by PLL and AGC control loop. Finally, the measured phase noise is –96dBc/Hz at 100kHz offset from 11.25GH. The dynamic range of output power from +4dBm to –15dBm was achieved by the AGC function and +0.62dB output power flatness. In the CMOS RF circuits simulation section, the 5GHz LC-tank voltage controlled oscillator and high frequency divider has been designed in a standard 0.25u CMOS process.