Parameters Extraction of InGaP/GaAs HBTs VBIC Model and Implementation of High-Speed Prescalerer

• Main Authors: Wei Yu Chen, 陳為昱
• Other Authors: 孟慶宗
• Format: Others
• Language: zh-TW
• Published: 2004
• Online Access: http://ndltd.ncl.edu.tw/handle/s35a2h

碩士 === 國立交通大學 === 電信工程系所 === 92 === In this paper, we will concentrate on two topics of Radio Frequency Integrated Circuits design issue. One is parameters extraction of InGaP/GaAs Heter-junction Bipolar Transistors using VBIC (Vertical-Bipolar Inter-Company) Model. The second is implementation and design of high speed prescaler. We will discuss about the effects which were implemented in the VBIC model but not include in Spice Gummel-Poon model. Then model InGaP/GaAs HBT using VBIC model to demo the capability of VBIC for both DC and AC characteristics. VBIC cannot model the HBT well in the part of transit time, since it use SGP equations which cannot tell the real case under different bias conditions to describe τf. Finally, a 1-D physical-based transit time model is used to model InGaP/GaAs HBT. The second part of this thesis is high speed prescaler. We will design and implement two prescaler for RF usage. The first is a 5GHz dual-modulus prescaler in SiGe technology consuming 31 mA from a 3.5 V supply. The prescaler (/4/5) can work up to 5GHz and the input return loss is below -7.5dB before 7.5GHz. The second one is comparison of two different topologies for truly 50% duty-cycle divide-by-3 circuit. The SHH topology can really extend input frequency range 30% for the divide-by-3.