Design Automation for Advanced Scan Architecture
碩士 === 國立成功大學 === 電機工程學系碩博士班 === 92 === The most commonly used DFT technique for cell-based circuits is the scan-based design. However, because a typical ASIC today may contain more than one million logic gates, the test time and test volume have become two major concerns of the system-on-a-chip (...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2004
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| Online Access: | http://ndltd.ncl.edu.tw/handle/03054028316289730445 |