multilevel sensing and verifying circuits for flash memory

• Main Author: 沈祐民
• Other Authors: 林泓均
• Format: Others
• Language: zh-TW
• Published: 2004
• Online Access: http://ndltd.ncl.edu.tw/handle/67008265225873535216

碩士 === 國立中興大學 === 電機工程學系 === 92 === Recently, flash memories have been widely used as mass storage for video and audio applications, such as MP3 plays, digital cameras, cellular phones, and other hand-held equipments. With the advance of process technology, there are rigid demands for high density, low cost, and low power flash memory. The multi-level storage has been achieved by dividing the threshold voltage into several levels to provide n-bit information in a single cell. However, the usage of multi-level cell induces the problems of process difficulty and the error probability during writing. This thesis proposes two types of circuit architectures for multi-level sensing and verifying. One of these circuits is designed with two sense amplifiers and verifying circuits, the other one is designed with a latch circuit to replace one sense amplifier. The mismatch immunity of the sense amplifier has been analyzed, and the simple operations of the verifying circuit are compared with the other circuits in this study.