A Shift-Based Segment of BISR Architecture for Embedded Memory
碩士 === 逢甲大學 === 電子工程所 === 92 === While system-on-chip (SoC) designs have the advantages of higher performance, lower power consumption, and smaller area when compared with system-on-board designs, test development is now identified as a major bottleneck. By using embedded memory unavoidably, and how...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2004
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| Online Access: | http://ndltd.ncl.edu.tw/handle/10960962034354391657 |