Implementation of a Traffic Signal Controller using FPGA
碩士 === 大葉大學 === 電信工程學系碩士班 === 92 === Field Programmable Gate Array and Complex Programmable Logic Device can control the circuit function and provide mass gates to implement complex circuit on single chip by user. The characteristics of FPGA are high capacity, low power consumption, high security an...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2004
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| Online Access: | http://ndltd.ncl.edu.tw/handle/36092489333808839500 |
| Summary: | 碩士 === 大葉大學 === 電信工程學系碩士班 === 92 === Field Programmable Gate Array and Complex Programmable Logic Device can control the circuit function and provide mass gates to implement complex circuit on single chip by user. The characteristics of FPGA are high capacity, low power consumption, high security and reprogrammable. This paper implements a 32-bits RISC processor by using Verilog HDL in association with the top-down design method from ASM behavioral description to hardware architecture. At last, simulation by SynaptiCAD and implementation by FPGA are performed for rapid prototyping and verification of one traffic signal control logic.
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