Integrating Power Management and Operation Scheduling in High-Level Synthesis

碩士 === 中原大學 === 電子工程研究所 === 92 === Operation scheduling is the most important task in highlevel synthesis. Most conventional operation scheduling algorithms paid attention to the minimization of control steps or the minimization of resources. However, as the design complexity continues to increase,...

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Bibliographic Details
Main Authors: Chung-Hsin Chiang, 江忠信
Other Authors: Shih-Hsu Huang
Format: Others
Language:zh-TW
Published: 2005
Online Access:http://ndltd.ncl.edu.tw/handle/46t66j
Description
Summary:碩士 === 中原大學 === 電子工程研究所 === 92 === Operation scheduling is the most important task in highlevel synthesis. Most conventional operation scheduling algorithms paid attention to the minimization of control steps or the minimization of resources. However, as the design complexity continues to increase, huge peak power may lead to logic errors due to voltage drops or reliability problems due to electromigration. Due to the popularization of portable and wireless communication, low power design is getting very important, to reduce average power can improve the life of battery and the energy saving. An efficient power management method is to use control logic to shut down unused operations. In this paper, we present an ILP (integer linear programming) formulation to model the problem of combining operation scheduling and power management for peak power reduction and average power but the run time is too long. Therefore, we propose a heuristic algorithm achieves the near optimal solution. Benchmark data show that our approach can reduce peak power and average power effectively.