| Summary: | 碩士 === 中原大學 === 電子工程研究所 === 92 === ABSTRACT
Array sensors not only have the ability of detecting multi-signal sources but also can improve the sensing reliability due to the statistical data processing acquired from repeated and identical sensors. Therefore, to develop ISFET based array sensors become more valuable and important in biochemical related research. In order to speed the design of sensor array circuit, to develop a SPICE-compatible behavior macromodel is needed.
This thesis present the development of ISFET behavior macromodel and the signal process circuit design of sensor array. The main achievements include a HSPICE-compatible macro-model of depletion–mode Si3N4 gate ISFET, a bridge-type drain-source follower circuit and an adjustable operating point source follower interface circuit for multiple-ISFET sensing applications, and a VT extractor temperature sensor accompanied with a temperature compensation electronics are presented.
In addition, a 10M Sample/s successive current comparison mode analog-to-digital converter is presented in this thesis. The resolution of the ADC is 8-bit and operated at 1.5V. The simulation results show that the ADC consumes 446.5uW only, the INL and DNL are 1~5LSB and -2.4~2.6LSB respectively.
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