The research on the Space Vector Pulse Width Modulation Control IC

碩士 === 國立臺北科技大學 === 電機工程系碩士班 === 91 === The main research of the thesis is based on Cell-based digital IC design flow, and use the TSMC 0.35um 1P4M cell library, to develop Space Vector Pulse Width Modulation(SVPWM)Control IC, and manufactured at S35_92C of the CIC’s advance chip. First ,...

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Main Authors: Wei-Luen Tzeng, 曾威倫
Other Authors: Yu-Liang Yan
Format: Others
Language:zh-TW
Published: 2003
Online Access:http://ndltd.ncl.edu.tw/handle/83011075255636066828
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spelling ndltd-TW-091TIT004420472015-10-13T13:35:32Z http://ndltd.ncl.edu.tw/handle/83011075255636066828 The research on the Space Vector Pulse Width Modulation Control IC 空間向量脈波調變控制積體電路之研究 Wei-Luen Tzeng 曾威倫 碩士 國立臺北科技大學 電機工程系碩士班 91 The main research of the thesis is based on Cell-based digital IC design flow, and use the TSMC 0.35um 1P4M cell library, to develop Space Vector Pulse Width Modulation(SVPWM)Control IC, and manufactured at S35_92C of the CIC’s advance chip. First , use the Hardware Description Language(VHDL)to encoding the system function, then use the compiler to make sure the syntax of the HDL is correct , after the Synthesis tool and auto place & routed tool and function simulation tool, make sure that every step is right, the design flow of the space vector modulation is complete. Not only can simulate the IC’s function expect software, but also can use Filed Programmable Gate Array(FPGA)as well. After complete the SVPWM control IC made use of Cell-based design flow, use the simulation tools, Modelsim and time-mill and power-mill, to simulate the RT level simulation and gate-level simulation and post-layout simulation of the control IC. We can find the conclusion in every level simulation, under the Cell-based IC Design flow, every function of the SVPWM control IC in this thesis, Sample rate control, Dead time control, Fundamental frequency control, Modulation control, and System Clock all correct. Then, use the FPGA to replace the design of SVPWM control IC , add the input signal control board made by myself , cooperated with the power driver and the induction motor of the three phase AC power, we can build a space vector modulation testing system. In the testing system, FPGA generates the control signal to drive the power driver successfully, and the power driver also makes the motor to rotate correctly. Under such multilevel simulation of the software and hardware simulation reality, all the design of the space vector pulse width modulation control IC in this thesis can movement correctly. So, this thesis make a motor control IC design flow successfully. In the future, the research will make the motor close-loop control system into IC under the same design flow, and combine the analog circuit, then the motor control IC of mixed signal is done, and also complete the final objective of this thesis. Yu-Liang Yan Guo-Ming Sung 嚴煜良 宋國明 2003 學位論文 ; thesis 72 zh-TW
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description 碩士 === 國立臺北科技大學 === 電機工程系碩士班 === 91 === The main research of the thesis is based on Cell-based digital IC design flow, and use the TSMC 0.35um 1P4M cell library, to develop Space Vector Pulse Width Modulation(SVPWM)Control IC, and manufactured at S35_92C of the CIC’s advance chip. First , use the Hardware Description Language(VHDL)to encoding the system function, then use the compiler to make sure the syntax of the HDL is correct , after the Synthesis tool and auto place & routed tool and function simulation tool, make sure that every step is right, the design flow of the space vector modulation is complete. Not only can simulate the IC’s function expect software, but also can use Filed Programmable Gate Array(FPGA)as well. After complete the SVPWM control IC made use of Cell-based design flow, use the simulation tools, Modelsim and time-mill and power-mill, to simulate the RT level simulation and gate-level simulation and post-layout simulation of the control IC. We can find the conclusion in every level simulation, under the Cell-based IC Design flow, every function of the SVPWM control IC in this thesis, Sample rate control, Dead time control, Fundamental frequency control, Modulation control, and System Clock all correct. Then, use the FPGA to replace the design of SVPWM control IC , add the input signal control board made by myself , cooperated with the power driver and the induction motor of the three phase AC power, we can build a space vector modulation testing system. In the testing system, FPGA generates the control signal to drive the power driver successfully, and the power driver also makes the motor to rotate correctly. Under such multilevel simulation of the software and hardware simulation reality, all the design of the space vector pulse width modulation control IC in this thesis can movement correctly. So, this thesis make a motor control IC design flow successfully. In the future, the research will make the motor close-loop control system into IC under the same design flow, and combine the analog circuit, then the motor control IC of mixed signal is done, and also complete the final objective of this thesis.
author2 Yu-Liang Yan
author_facet Yu-Liang Yan
Wei-Luen Tzeng
曾威倫
author Wei-Luen Tzeng
曾威倫
spellingShingle Wei-Luen Tzeng
曾威倫
The research on the Space Vector Pulse Width Modulation Control IC
author_sort Wei-Luen Tzeng
title The research on the Space Vector Pulse Width Modulation Control IC
title_short The research on the Space Vector Pulse Width Modulation Control IC
title_full The research on the Space Vector Pulse Width Modulation Control IC
title_fullStr The research on the Space Vector Pulse Width Modulation Control IC
title_full_unstemmed The research on the Space Vector Pulse Width Modulation Control IC
title_sort research on the space vector pulse width modulation control ic
publishDate 2003
url http://ndltd.ncl.edu.tw/handle/83011075255636066828
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