| Summary: | 博士 === 國立臺灣大學 === 電機工程學研究所 === 91 === In this dissertation, the hardware architecture design and implementation of image coding systems
are presented. The research focuses on three image coding standards: JPEG, JPEG2000, and MPEG-4
Visual Texture Coding (VTC).
JPEG is a well-known and matured standard. It has been widely used for natural image compression,
especially very popular for digital still camera applications. In the first part of this
dissertation, we proposed fully pipelined JPEG encoder and decoder for high speed image
processing requirements in post-PC electronic appliances. The processing power is 50 million
samples per second at 50 MHz working frequency. The proposed architectures can handle
million-pixel digital images'''''''' encoding and decoding in very high speed. Other feature is that
both the encoder and decoder are stand-alone and full-function solutions. They can encode or
decode the JPEG compliant file without any aids from extra processor.
JPEG2000 is the latest image coding standard. It is defined to be a more powerful standard after
JPEG. JPEG2000 provids better compression performance, especially at low bitrates. It also
provides various features, such as quality and resolution progressive, region of interest coding,
lossy and lossless coding in an unified framework, etc. The performance of JPEG2000 comes at the
cost of higher computational complexity. In the second part of the dissertation, we discuss the
challenges and issues of the design of a JPEG2000 coding system. Cycle efficient block encoding
and decoding engines, and computation reduction techniques by Tier-2 feedback are proposed for
the most critical module, Embedded Block Coding with Optimized Truncation (EBCOT). With the
proposed parallel checking and skipping-based coding schemes, the scanning cycles can be reduced
to 40% of the direct bit-by-bit implementation. As for the Tier-2 feedback control in lossy
coding mode, the execution cycles and therefore power consumption can be lowered to 50% in the
case of about 10 times compression.
MPEG-4 Visual Texture Coding (VTC) tool is another compression algorithm that also adopts the
wavelet-based algorithm. In VTC, Zero-tree coding algorithm is adopted to generate the context
symbols for arithmetic coder. In the third part, the design of the zero-tree coding algorithm is
discussed. Tree-depth scan with multiple quantization mode are realized. Dedicated data access
scheme are designed for smooth coding flow.
In each chapter, detailed analysis of the algorithms are provided first. Then, efficient hardware
architectures are proposed exploiting special algorithm characteristics. The proposed dedicated
architectures can greatly improve the processing performance compared with a general
processor-based solution. For non-PC consumer applications, these architectures are more
competitive solutions for cost-efficient and high performance requirements.
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