Incorporating UML with Petri Net for design and analysis of computer integrated manufacturing system
碩士 === 國立海洋大學 === 機械與輪機工程學系 === 91 === In modern industry, computer integer manufacturing (CIM) has become a major trend and is still attracting a lot of attentions on research and development in manufacturing. Manufacturing integration does not only mean automating and integrating manufacturing fac...
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Format: | Others |
Language: | en_US |
Published: |
2003
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Online Access: | http://ndltd.ncl.edu.tw/handle/21715386138908045838 |
Summary: | 碩士 === 國立海洋大學 === 機械與輪機工程學系 === 91 === In modern industry, computer integer manufacturing (CIM) has become a major trend and is still attracting a lot of attentions on research and development in manufacturing. Manufacturing integration does not only mean automating and integrating manufacturing facilities but also managing and controlling the information flow among all computerized manufacturing application systems. It is a manpower- and time- consuming task to develop a highly maintainable computer software module for information control by repeated testing and debugging. Although there are some syntax errors can be found through the debugging, there are still some logical errors incurred during the design process that can not be found. This thesis used the standard UML diagram to model standard information flow procedures and industry dependent regulations and rules in designing the workflow control module among manufacturing application systems for CIM systems. Each use case in Use case diagram specified by UML represents one specific set of related scenarios in controlling the information flow. They can be modeled by activity diagrams in UML and then transformed into corresponding Petri net models. We then utilized the configurable graphic interface and the mathematical analysis methods of the Petri Net to find the logical error in these models. The Petri net was then analyzed by two fast algorithms with the execution of equivalent Integer Programming problems, and LINDO was used to solve these IP problems. Designer can correct as many logical errors as possible during the design phase
of the system before implementation.
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