Chip Design for an Elliptic Curve Cryptosystem with Reduced Die Size

• Main Authors: Ming-Che Chang, 張銘哲
• Other Authors: 呂紹偉
• Format: Others
• Language: zh-TW
• Published: 2003
• Online Access: http://ndltd.ncl.edu.tw/handle/42130888412318444750

碩士 === 國立海洋大學 === 電機工程學系 === 91 === Personal digital devices, many equipped with wireless capabilities, are now indispensable tools for many people in their daily life. However, both data and messages stored and exchanged through these devices are inherently vulnerable to unauthorized access and eavesdropping. Data security for these devices can be best fortified by using a cryptosystem which provides high degree of security under tight constraints of hardware resources. The elliptic curve cryptosystem (ECC) is best known by its ability to use significantly shorter keys, meaning less hardware, to render same security levels offered by other cryptosystems and thus suitable for most mobile computing devices. This thesis describes the design and implementation of an ECC chip tailored for portable devices. To reduce the hardware complexity, we adopted the optimal normal basis representation for implementing the finite field (F2m) operations. The amount of hardware required is further reduced by the use of an on-chip memory, rather than registers, for the storage of the keys, parameters and operands. An interface register is constructed between the RAM and the ALU to improve the utilization of the ALU. Our RTL models are written in VHDL. After verifications, we use the TSMC 0.35 μm cell library to implement our design. DFT and BIST circuits have been built into the chip to enhance testability. This 155-bits elliptic curve cryptochip can operate at a clock rate of 122 MHz and has baud rates of 110.9 kbps and 109.9 kbps when performing encryption and decryption operations, respectively. The finished ECC chip has a size of 2.226×2.226 mm2. It provides acceptable performance while uses less hardware than most similar designs.