Hierarchical pipeline insertion algorithm
碩士 === 國立清華大學 === 資訊工程學系 === 91 === Achieving high performance is one of the major goals of VLSI designs. The pipeline architecture is widely used for high-performance processor designs. The pipeline architecture can greatly reduce the circuit timing. The other goal of VLSI designs is to...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2003
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| Online Access: | http://ndltd.ncl.edu.tw/handle/33678909009119879728 |