| Summary: | 碩士 === 國立交通大學 === 電資學院學程碩士班 === 91 === The LC tank configuration is the widely used architecture for RF model in 802.11B synthesizer. An LC voltage controlled oscillator (LC-VCO) is used as the core oscillator and the programmability of the clock is also necessary in order to provide various output clock signals for different building blocks of 802.11B system. To fulfill those requirements, an LC voltage-controlled oscillator phase locked loop (LC-VCO-PLL) is used as a basic clock source. Deep-submicron CMOS technology has advantages such as low power, high density and high sensitivity. In this thesis a fully integrated frequency synthesizer, using UMC 018-um CMOS (1P6M) 1.8V process model. The VCO frequency range is from 2.1G Hz to 3.2G, and the phase noises are -76.67 dBc@ 100KHz, -89.33dBc @ 1MHz.
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