| Summary: | 碩士 === 國立交通大學 === 電子工程系 === 91 === In this thesis, a dual gain mode direct-conversion receiver front-end under 802.11a specification is designed and implemented by UMC 0.18μm 1P6M process. Giga-solution RF component models, SPIL QFN series package, and FR-4 printed-circuit-board are adopted for the implementation and assembly. The front-end implementation includes a LNA, a mixer, a high pass filter, and a baseband amplifier. The measurement result indicates the voltage gain to be 27.4dB and 14.3dB under high and low gain mode individually, and IIP3 is measured as -12.8dBm and +4.5dBm. IIP2 is measured as -13.5dBm, and noise figure is 8.5dB.
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