The investigation of 1.0 nm high-quality oxynitride gate dielectric was grown by rapid thermal process
碩士 === 國立交通大學 === 電子工程系 === 91 === When the gate oxide thickness downs to 1.0 nm regime, the direct-tunneling current becomes main key issue for high-performance CMOS beyond 0.1μm. In my research work, we have developed high-quality silicon oxynitride (SiON) with physical thickness 1.0 nm...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2003
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| Online Access: | http://ndltd.ncl.edu.tw/handle/52171899853973658131 |