Using ECR-plasma Processing Technology to Investigate the RIE-treated Surface and to Form the Gate Dielectric and Passivation Insulator for GaN Application

• Main Authors: Chao-Chen Cheng, 鄭兆禛
• Other Authors: Kow-Ming Chang
• Format: Others
• Language: en_US
• Published: 2002
• Online Access: http://ndltd.ncl.edu.tw/handle/63972283195300467771

博士 === 國立交通大學 === 電子工程系 === 91 === GaN is a highly potential semiconductor material with the properties of wide bandgap (3.4 eV), high breakdown electric field, high carrier mobility and fair thermal conductivity. It is not only applied widely in the blue and green light emitting diodes (LEDs), but also regarded as the key material to fulfill the next generation DVD laser diodes (LDs). In the aspect of high power electronics and microwave communication, it also attracts much attention and intensive research. However, the processing technologies are not as mature as those developed in Si and GaAs materials. There are a number of obstacles to be overcome before these advanced devices are commercially available. In this thesis, we used the electron cyclotron resonance principle to generate high-density plasma at such a low pressure of 1 mTorr for etching GaN and chemically depositing silicon nitride dielectric films. There are three aspects under investigation accompanied by other facilities. First of all, we focused upon the effect of dry etching on the ohmic contact to p-type GaN and surface properties. Secondly, silicon nitride film was used as the gate dielectric for GaN-based metal-insulator-semiconductor field effect transistors (MISFETs). The characteristics were assessed and compared with other gate materials. At last, the silicon nitride film was deposited at low temperatures for passivation of LEDs practically. We found that the packaging yield was greatly increased and the light output was enhanced with this passivation procedure. In Part 1, the p-type layer of a GaN-based LED wafer was etched by the ECR-RIE etcher and then Ni/Au alloy was used as the ohmic contact. The post-etch treatments included N2 plasma treatment and rapid thermal annealing. The variation of contact characteristics was observed by current-voltage (I-V) curves. The main purpose was to find an easy way to recover the degradation of contact properties followed by dry etching on the p-type base layer when heterojunction bipolar transistors (HBTs) were fabricated. We found that the contact performance was getting worse significantly after the dry etching treatment. The original linear curve became a nonlinear one similar to the I-V characteristics of Schottky barriers. The RTA treatment at 700°C for 3 minutes would improve the performance very much, but RTA at other temperatures and N2-plasma treatment could not have this effect. The RIE treatment would damage the surface lattice structure and produce N vacancies, which transform the surface into n-type GaN. In addition, the damaged surface tended to adsorb oxygen, even though the samples were kept in N2 ambiences. From grazing incident angle X-ray diffraction (GIXD), atomic force microscopy (AFM), X-ray photospectroscopy and photoluminescence (PL) analyses, RTA at 700°C could cause the reconstruction of the surface lattice and the decrease of oxygen content. Although the N2 plasma treatment supplemented the nitrogen loss caused by RIE, these added atoms could not form effective bonds with the surface and easily escape again in the alloying process. In Part 2, we used ECR-CVD to deposit a high-quality silicon nitride film at 300°C. The dielectric and optical properties of an obtained film were close to the film deposited by low pressure chemical vapor deposition at 800°C. This film is adequate to be the gate dielectric of MISFET. By the analysis of Termann method, the capacitance-voltage (C-V) result showed that the negative fixed charge density was 1.1x1011 cm-2, and the interface trapped charge density was lower than 4x1011 cm-2eV-1. The lowest value appeared to be 5x1010 cm-2eV-1 at 0.6 eV below the conduction band edge. From I-V measurement, the MIS-diode exhibited a high breakdown field of 11.6 MV/cm. Even at 350°C, the breakdown field was higher than 5.7 MV/cm. Compared with the materials that have been published so far, the silicon nitride gate dielectric has the advantages of simple structures, high breakdown field as well as low interface charge densities. Moreover, the whole process consumes little thermal budget and can prevent the diffusion between different epitaxial layers. In the other chapter of Part 2, we utilized another method to confirm the result from Termann analysis. The MIS capacitor, driven into deep depletion region, .was exposed to UV light illumination from a GaN LED. The interface trapped charges, which could not catch up the sweeping voltage, were excited and released from the trap sites. This would cause the C-V curve shift, and the average charge density could be obtained from this shift. The value is 3x1011 cm-2eV-1 and close to the result in the former chapter. The technologies involved in the process integration of MISFET were also proposed. The initial result demonstrated that the channel conductance was controlled well by the gate voltage. From Auger electron analysis, the interface between the dielectric and the semiconductor was steep and apparent. Oxygen ion implantation was used as the isolation method that can endure the normal operating temperature. In Part 3, we still utilized ECR-CVD to deposit silicon nitride films for LED passivation. The deposition temperature was as low as room temperature, and the lift-off technique could be adopted to be compatible with the original fabrication steps. The packaging yield was raised and the light output was enhanced by 6% with the passivation layer. Besides, the reliability with high temperature and humidity tests was improved.