Hardware Realization of Digital Single-Phase Power Factor Corrector via Field Programmable Gate Array
碩士 === 國立成功大學 === 電機工程學系碩博士班 === 91 === In this thesis, the implementation of single-phase power factor corrector has been effectively achieved with the aid of field programmable gate array (FPGA). By using the distributed arithmetic method, the number of configurable logic cells inside the FPGA can...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2003
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/26651807793865445304 |