The Design of 3.5 GHz Microwave Power Amplifier

• Main Authors: Yu-Jui Yang, 楊侑叡
• Other Authors: Shoou-Jinn Chang
• Format: Others
• Language: zh-TW
• Published: 2003
• Online Access: http://ndltd.ncl.edu.tw/handle/81870857586713649342

碩士 === 國立成功大學 === 微電子工程研究所碩博士班 === 91 === In this thesis, it is purposed that a 3.5 GHz PHEMT microwave power amplifier with dual dc supply for the wireless LAN applications. In this thesis, we discuss about basic theories in microwave circuit design and circuit design techniques. To meet the requirements of the system, we specify the power amplifier as follows: frequency range of 3.4 ~ 3.6 GHz, small signal gain of 40 dB, output power at 1 dB gain compress point of 37 dBm, power efficiency of 25 %, and output IP3 of 39 dBm. In addition, we select the quiescent point of 10 Volt — 2000 mA in class A operation. Furthermore, the chip is fabricated in Transcom, Inc. GaAs PHEMT process. From the aspect of output power matching, we perform the output matching network using the load line theory (Cripps Nethod) and the small-signal model of PHEMT. We select dual-bias configuration to implement dc supply circuit. In addition, we use FR-4 evaluation board to measure the performance of PA. Finally, we compare the discrepancies between the measured and simulated results and the specifications. The microwave power amplifier really presents well matched with the requirements for 3.5 GHz wireless LAN applications.