The Architecture Design of High Performance AES for Multiple Purposes
碩士 === 義守大學 === 資訊工程學系 === 91 === Recently, the NIST announced Rijndael algorithm to be a new encryption standard to replace the unreliable DES system [10]. In this thesis, we try to increase the robustness and safe of AES (Advanced Encryption Standard). This is another way increasing the...
Main Authors: | Cheng-Ching Jen, 鄭景仁 |
---|---|
Other Authors: | Ming-Haw Jing |
Format: | Others |
Language: | en_US |
Published: |
2003
|
Online Access: | http://ndltd.ncl.edu.tw/handle/16556461342705442068 |
Similar Items
-
High Performance AES Cipher Architecture Design and Chip Implementation
by: Li-Chung Chang, et al.
Published: (2003) -
High Performance Hardware Architecture Design of Homomorphic AES for Cloud Computing
by: Tzu-YinKuo, et al.
Published: (2017) -
The Design and Implementation of an AES Processor Architecture
by: Qi-Rui Bai, et al.
Published: (2019) -
Power efficient and high performance VLSI architecture for AES algorithm
by: K. Kalaiselvi, et al.
Published: (2015-09-01) -
IMPLEMENTATION OF HIGH SPEED ARCHITECTURE FOR AES-OCB ALGORITHM
by: Yu-Chieh Lin, et al.
Published: (2009)