Method to Improve the Throughput and Retain the CD Performance for DUV Process

碩士 === 國立臺北科技大學 === 生產系統工程與管理研究所 === 90 === Chemically amplified resist based on acid catalysis for DUV(Deep Ultra-violet) li-thography is a promising technology for patterns of 0.2 um or less. Linewidth varia-tion is mainly induced by the effect of acid diffusion during PED or by the ne...

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Bibliographic Details
Main Authors: Hsiao Yung Tsung, 蕭永琮
Other Authors: Liu Ta Chung
Format: Others
Language:zh-TW
Published: 2002
Online Access:http://ndltd.ncl.edu.tw/handle/00663784262976040169
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Summary:碩士 === 國立臺北科技大學 === 生產系統工程與管理研究所 === 90 === Chemically amplified resist based on acid catalysis for DUV(Deep Ultra-violet) li-thography is a promising technology for patterns of 0.2 um or less. Linewidth varia-tion is mainly induced by the effect of acid diffusion during PED or by the neutraliza-tion of photogenerated acid. In this work, the influence of PED and PEB baking conditions have been investi-gated based on the measured linewidth, i.e., Critical Dimension (CD). , the linewidth change for different over-baking periods and baking temperature settings are investi-gated in this study. The previously established model has been modified to describe the linewidth for various resists and process conditions. The linewidth of one specific resist broadened after exposure and then became a constant value. To obtain a high yield product suitable CD is one of the key parameters. This work proposes an idea to prevent the CD variation induced by PED and over-baking. Based on the established model and measured results, the different linewidth variations for various delay conditions can be obtained. By analyzing in-line stepper and track configuration, the maximum number of wafers affected by delay time can be obtained. Through automatic control can prevent the CD variation caused by any non-predicted delay. In summary, the behavior of the linewidth for different process conditions are ana-lyzing in this work. A model is also established to describe the linewidth change. Meanwhile, the hardware configuration is investigated. By combining those results, the throughput can be raised, and still maintain the quality of the resist performance.