| Summary: | 碩士 === 南台科技大學 === 電子工程系 === 90 === This thesis presents a programmable switched-current filter design. In order to improve the filter performance and reduce its supply voltage as well as power consumption, three circuit techniques including S2I, ground gate amplifier(GGA) and class-AB, are adopted to implement the switched-current integrator which is the basic block of the filter. In addition, MOSFET only current dividers(MOCD) via R-2R structure are employed to develop a programmable 5th order Chebyshev low pass filter. The filter has been designed and implemented using 0.35μm 1P4M standard CMOS process. For a sampling frequency of 64KHz, the 5th order Chebyshev low pass filter met specifications of 0.01dB pass-band ripple and 4KHz bandwidth. Simulation results show that the filter has maximum signal-to-noise and distortion ratio of 45dB, power consumption of 7.7mW, and dynamic range of 60dB with single 2.5V power supply.
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