Automatic Verilog Code Generation of an 8-Bit RISC Micro-controller
碩士 === 南台科技大學 === 電子工程系 === 90 === In this paper, we describe a design method, which can automatically generate verilog code for an 8-bit RISC micro-controller with a user-definable instruction set. With this method, one can shorten the verilog coding time, increase the efficiency of veri...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2002
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| Online Access: | http://ndltd.ncl.edu.tw/handle/55957143643896340979 |