Fabration of Low Power Supply Heterojunction Bipolar Transistor
碩士 === 國立海洋大學 === 電機工程學系 === 90 === In this thesis, we report a newly designed Al0.45Ga0.55As/GaAs digital graded superlattice emitter (DGSE) structure, which forms a step-wise graded composition to smooth out the potential spike as it is combined with a p-base layer first. Both theoretic...
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ndltd-TW-090NTOU04420432015-10-13T10:34:08Z http://ndltd.ncl.edu.tw/handle/66670553485303002631 Fabration of Low Power Supply Heterojunction Bipolar Transistor 低電源用異質接面雙極性電晶體之製造 Yen Wei Wu 吳彥緯 碩士 國立海洋大學 電機工程學系 90 In this thesis, we report a newly designed Al0.45Ga0.55As/GaAs digital graded superlattice emitter (DGSE) structure, which forms a step-wise graded composition to smooth out the potential spike as it is combined with a p-base layer first. Both theoretical derivation and experimental results of DGSE bipolar transistor are included. We obtained good agreements between theoretical calculation and experimental data. Theoretical calculation shows that tunneling current of electron has effectively increased with using DGSE structure. Experimentally, we have successfully fabricated DGSE bipolar transistor with and without InGaP/DGSE passivation layer. For comparison with InGaP/GaAs ones with an InGaP passivation layer, the VON(E-B) (the collector current exceeds 1 μA) of InGaP/DGSE HBT is 0.87 V, which is 80 mV lower than the 0.95-V VON(E-B) of an InGaP HBT over a wide rang of current level. And the collector ideality factor hc are 1.2 and 1.1 as well as the base ideality factor hb are 1.9 and 1.1 respectively. On the other hand, the small offset voltage of 55 mV as compared to a 110-mV offset voltage of our compared device reveals that the DGSE structure really eliminates the spike resulting from DEC.The current gain of the studied HBT is as high as 250 and is even enhanced to 385 with an InGaP passivation layer. Second, we proposed a method of wet-oxidation treatment in this study. Experimental results reveal that the studied HBT’s exhibit reduced collector currents at a fixed base current in the early stage of wet-oxidation treatment. However, better surface passivation and higher current gain are available after an appropriate wet-oxidation treatment is used to reduce base current. Therefore, we still obtained high current gain, small offset voltage, low knee voltage, low turn-on voltage, and breakdown voltage by an appropriate wet-oxidation treatment. Wen Shiung Lour 羅文雄 2002 學位論文 ; thesis 51 zh-TW |
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碩士 === 國立海洋大學 === 電機工程學系 === 90 === In this thesis, we report a newly designed Al0.45Ga0.55As/GaAs digital graded superlattice emitter (DGSE) structure, which forms a step-wise graded composition to smooth out the potential spike as it is combined with a p-base layer first. Both theoretical derivation and experimental results of DGSE bipolar transistor are included. We obtained good agreements between theoretical calculation and experimental data. Theoretical calculation shows that tunneling current of electron has effectively increased with using DGSE structure. Experimentally, we have successfully fabricated DGSE bipolar transistor with and without InGaP/DGSE passivation layer.
For comparison with InGaP/GaAs ones with an InGaP passivation layer, the VON(E-B) (the collector current exceeds 1 μA) of InGaP/DGSE HBT is 0.87 V, which is 80 mV lower than the 0.95-V VON(E-B) of an InGaP HBT over a wide rang of current level. And the collector ideality factor hc are 1.2 and 1.1 as well as the base ideality factor hb are 1.9 and 1.1 respectively. On the other hand, the small offset voltage of 55 mV as compared to a 110-mV offset voltage of our compared device reveals that the DGSE structure really eliminates the spike resulting from DEC.The current gain of the studied HBT is as high as 250 and is even enhanced to 385 with an InGaP passivation layer.
Second, we proposed a method of wet-oxidation treatment in this study. Experimental results reveal that the studied HBT’s exhibit reduced collector currents at a fixed base current in the early stage of wet-oxidation treatment. However, better surface passivation and higher current gain are available after an appropriate wet-oxidation treatment is used to reduce base current. Therefore, we still obtained high current gain, small offset voltage, low knee voltage, low turn-on voltage, and breakdown voltage by an appropriate wet-oxidation treatment.
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author2 |
Wen Shiung Lour |
author_facet |
Wen Shiung Lour Yen Wei Wu 吳彥緯 |
author |
Yen Wei Wu 吳彥緯 |
spellingShingle |
Yen Wei Wu 吳彥緯 Fabration of Low Power Supply Heterojunction Bipolar Transistor |
author_sort |
Yen Wei Wu |
title |
Fabration of Low Power Supply Heterojunction Bipolar Transistor |
title_short |
Fabration of Low Power Supply Heterojunction Bipolar Transistor |
title_full |
Fabration of Low Power Supply Heterojunction Bipolar Transistor |
title_fullStr |
Fabration of Low Power Supply Heterojunction Bipolar Transistor |
title_full_unstemmed |
Fabration of Low Power Supply Heterojunction Bipolar Transistor |
title_sort |
fabration of low power supply heterojunction bipolar transistor |
publishDate |
2002 |
url |
http://ndltd.ncl.edu.tw/handle/66670553485303002631 |
work_keys_str_mv |
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