Design of a 10-bit pipelined Analog-to-Digital Converter for parallel structure
碩士 === 國立海洋大學 === 電機工程學系 === 90 === Due to the increasing range of portable application of wireless communication within the next few years, the analog-to-digital converter(ADC) must increase their sampling rate and lower the power dissipation. A pipelined ADC which is suitable for using in parallel...
Main Authors: | Chih-Kang Cheng, 鄭至剛 |
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Other Authors: | Wan-Rone Liou |
Format: | Others |
Language: | zh-TW |
Published: |
2002
|
Online Access: | http://ndltd.ncl.edu.tw/handle/44958046075214023733 |
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