VLSI Architecture Design of DCT-based to DWT-based Image Transcoder

• Main Authors: Chuang Yi-Chia, 莊益嘉
• Other Authors: Chen Yung-Chang
• Format: Others
• Language: zh-TW
• Published: 2002
• Online Access: http://ndltd.ncl.edu.tw/handle/70130900366990960482

碩士 === 國立清華大學 === 電機工程學系 === 90 === The wavelet-transform based image compression technique has been widely used in the newest image compression standards, such as JPEG200 and MPEG4. In spite of high compression rate and flexibility in the ultilization of wavelet-transform, older image compression technique, DCT-transform is still used in the older image compression standards, such as MPEG1, MPEG2 and H.263. Because of the coexistence of DCT-transform and DWT-transform, we try to design a DCT to DWT transcoder. If we have this kind of transcoder, the incompatibility between older image compression standards and newer one will be resolved. It’s well known that DCT-transform and DWT-transform are composed of their own mathematical equations. Many Fast DCT-transform and Fast DWT-transform algorithms have been developed by factorizing these equations. Beside factorization, some properties, like symmetry and particular coefficients can be used to speed up the hardware computation speed and reduce chip area. In our current research, we use matrix operation to investigate if there exists some ways to meet the requirements. This kind of investigation is similar to mathematical equation factorization. Accordingly, we have developed different kinds of hardware architectures of the DCT to DWT trascoder. In this thesis, we summarized our matrix operation investigation. Some architectures have less area but lower computation speed and others have higher computation speed but must sacrifice its own area. By the TSMC .35um cell-library, each of the proposed transcoder in this research achieves 50-MHz working speed. Comparisons between each of them are shown later.