Decomposition of Extended Finite State Machine for Low Power Design
碩士 === 國立清華大學 === 資訊工程學系 === 90 === Previous work has shown that power reduction can be achieved through turning off portions of circuit when they are idle. Unlike previous work which focused only on either controller or datapath, we propose a decomposition technique taking both controller and datap...
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Other Authors: | |
Format: | Others |
Language: | en_US |
Published: |
2002
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Online Access: | http://ndltd.ncl.edu.tw/handle/76240420137714987806 |
Summary: | 碩士 === 國立清華大學 === 資訊工程學系 === 90 === Previous work has shown that power reduction can be achieved through turning off portions of circuit when they are idle. Unlike previous work which focused only on either controller or datapath, we propose a decomposition technique taking both controller and datapath into consideration. The state probability of a FSM provides the execution frequency of operation in that state. Operations performed in states provide the resource requirement which can be used to determine the resource sharing among states. Experimental results show that on the average, 10% area reduction and 24% power reduction can be achieved as compared to designs without decomposition.
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