Implementation of a Low-Power Digital Signal Processor
碩士 === 國立中山大學 === 資訊工程學系研究所 === 90 === In this thesis, we present an implementation of a low-power digital signal processor. We design the hardware units and analyze the instruction set for digital signal process applications. Besides, the power consumption issue is considered. We present two sol...
Main Authors: | Szu-jui Fu, 傅思叡 |
---|---|
Other Authors: | Shen-fu Hsiao |
Format: | Others |
Language: | zh-TW |
Published: |
2002
|
Online Access: | http://ndltd.ncl.edu.tw/handle/19479052255898395369 |
Similar Items
-
Low-power digital signal processor for hearing aids
by: Chang, Kuo-Chiang, et al.
Published: (2015) -
FPGA Implementation of Low Power CORDIC Signal Processors
by: Yen-Chang Huang, et al.
Published: (2011) -
Implementation of High Power Factor Correction Converter by Digital Signal Processor
by: Shun-sheng Cheng, et al.
Published: (2010) -
Digital Signal Processor Implementation of Initial Downlink
by: Chen, Wei-Yu, et al.
Published: (2011) -
Low Power Multi-Port Register File Design for Digital Signal Processor
by: Hua,Chung-Hsien, et al.
Published: (2003)