| Summary: | 碩士 === 國立交通大學 === 電子工程系 === 90 === In this thesis, we propose a new direct digital frequency synthesizer (DDFS). It has the merits of high speed, low complexity and high spectrum purity. It is based on a novel interpolation algorithm for sinusoidal functions. The algorithm accurately characterizes the interpolation error. With a small lookup table of words, the DDFS successively interpolate the target value in a pipeline fashion using only N addition operations, where N is the output word length. Simulation shows that for N=16-bit example, 100dBc of SFDR (spurious free dynamic range) is achieved, with a lookup table of only 304 bits. In addition, due to its pipeline structure, the new DDFS have a very high throughput rate and a very short cycle time of about an adder delay. The new design has a smaller table size and less datapath requirement than the best known DDFS by Madisetti et al, at the same speed performance.
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