| Summary: | 碩士 === 國立交通大學 === 電子工程系 === 90 === Recently, the flash memory has become one of the main stream of nonvolatile semiconductor memory product, which has been widely used for mass data storage, such as the digital cameras and hand-held computer as a portable mass storage. For the design of flash memories, the performance and reliability are still the major concerns, in which two approaches are usually employed, one is to develop a novel cell structure, and the other one is to develop a different operation scheme. The most effective way to achieve high performance and low operation voltage requirements are the two approaches as mentioned above. The objective of this thesis is to design an appropriate structure based on the existing ETOX cell by a combination of a new programming scheme.
In this thesis, first, we proposed a programming scheme, which is called Substrate Bias Enhanced Drain Avalanche Breakdown Hot-Electron (AHE) Injection, for low voltage, low power, and high performance flash memory application,. For the requirement of the low voltage operation, we implant a highly doped boron at the drain side (Pocket Implantation) and control a proper depth from the silicon and silicon dioxide interface to make the cell reach breakdown easily. In addition, this scheme has high programming speed, and meets the requirement of high performance operation. In the term of cell reliability, the interface state (Nit) generation can be suppressed since the position of avalanche breakdown is away form at the silicon and silicon dioxide interface. Also, with the improvement of process technology, reduction of drain and substrate junction damage during programming can be achieved by exactly controlling the position of highly doped implanted boron. In terms of the reliability, gate disturb and drain disturb are greatly reduced as a result of a low voltage operation. The present scheme is better than widely used channel hot-electron (CHE) injection. As a whole, the AHE programming scheme based on the improved ETOX cell structure can be well-suited for the next generation high performance and high reliability flash memory applications.
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