| Summary: | 碩士 === 國立成功大學 === 機械工程學系碩博士班 === 90 === Abstract
The increasing complexity and miniaturization of modern integrated circuits (ICs) demand a higher device yield, and hence lower defect density in the active region of silicon devices. For a deep-sub-micrometer device, a single metal precipitate could cause a distortion of electrical properties, resulting in a faulty IC. Therefore, a better knowledge of the diffusion route and behavior of metallic impurities introduced into the silicon substrate during device fabrication is essential for contamination control and for promoting the circuit yield.
Inspired by interesting previous experimental results, in this project we conduct a theoretical investigation into the problem of metallic impurity diffusion across the photoresist/substrate interface in lithographical processes for semiconductor devices. In particular, the temperature dependence of the impurity diffusion ratio, i.e., the ratio of the amount of impurities diffused into the substrate to that originally in the photoresist, is studied. Furthermore, here we quantify how much the temperature dependence of impurity diffusion ratio is altered by the effects of finite photoresist thickness. Even more aggressively, in order to fully exploit experimental results, analytical methods for extracting the values of the mass diffusion coefficients of various impurities in the substrate and photoresist, and their segregation coefficients at the interface, from experimental data are devised. It is expected that the results of this thesis will be useful for future experimental planning and for contamination control in realistic lithographical processes.
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